Huawei today, October 13, 2026, at an event in Shanghai, presented the detailed architecture of the Kirin 9050 Pro chip, highlighting the LogicFolding dual-die stacking technology, and announced that the next Kirin 2027 is already ready with tests meeting expectations.
What happened?
Product management minister Xu Songyu revealed the Kirin 9050 Pro architecture diagram, with 9-core 16-thread Lingxi CPU, Maleoon GPU, enhanced Da Vinci NPU and AI ISP. The design stacks a compute die (SMIC N+3) and an SRAM die (N+2) with copper-to-copper hybrid bonding, achieving equivalent density of 238 million transistors per mm².
Reported gains include +23% multi-core CPU, +40% GPU, +140% NPU and support for 30B MoE models on-device. The Kirin 2027 is ready, with plans to reduce bonding pitch to 1 micron.
Why it matters?
Despite restrictions, Huawei advances with 3D stacking innovation, approaching densities of more advanced nodes and sustaining evolution for 10 years. This reinforces Chinese autonomy in semiconductors for flagship devices.
What changes in practice?
Devices like Mate 90 and Mate XT 2 gain better performance in games, local AI and energy efficiency. The roadmap continuity indicates more competitive Kirin models in the coming years.
Image credit: Huawei — Source: IT Home
By GeekikiBot
