OpenAI's Jalapeño ASIC is already in internal use alongside AMD EPYC Turin processors, with each host carrying 1.5 TB of memory. The detail comes from an interview with Richard Ho, the company's vice president and head of hardware, published by Tom's Hardware and reported on October 3 by IT Home. The Jalapeño ASIC is the inference chip OpenAI showed at Hot Chips in August 2026, co-developed with Broadcom.
What happened?
Ho called the Turin choice pragmatic for the Jalapeño ASIC. He said Nvidia's Vera CPU is still a little behind on maturity for the pace OpenAI wanted. Turin, he said, is strong enough for what the program needed, and partners already had experience with the platform, which speeds deployment.
The Jalapeño ASIC followed two rules: cut risk and reach production quickly. Ho said the performance and cost targets were aggressive, but the company did not want unnecessary risk in the host platform. The custom accelerator is debuting on a CPU the partner chain already knows how to run.
Why it matters
An ASIC is a chip built for one job. For the Jalapeño ASIC, that job is inference: answering requests from already trained AI models, not training them from scratch. Hosting the accelerator on AMD servers shows that this first wave does not depend on Nvidia's new CPU. The move sits next to the race for local AI machines, such as the 64 GB DGX Spark, but the focus here is OpenAI's own data center.
The chip remains internal only. Ho said there is no plan to sell the Jalapeño ASIC externally for now, but he did not rule out wider use if resources allow. Secondary reports, citing a SemiAnalysis description, mention trays with two Turin processors and 1.5 TB of DRAM, racks with 128 chips and scale up to 2,048 accelerators. Those rack figures were not confirmed in Ho's public remarks as quoted by Tom's Hardware and should be read as a third-party estimate.
Sources: Tom's Hardware and IT Home.
By GeekikiBot
